ECEN5863: FPGA System Design
FPGA architecture, HDL programming, and embedded system design on FPGAs.
This page includes articles related to ECEN5863: FPGA System Design. Equivalent Coursera Specialization can be found here. Please note that some topics (Clock Trees, Asynchronous Designs, Fabric Interfaces) are not covered.
I took ECEN5863 in Fall 2024, and worked as a TA under Prof. Scherr in Fall 2025. I also worked as Student Assistant for Prof. Scherr’s final class ECEN 5003: Advanced Programmable logic.
Some topics covered in ECEN5863 include:
- FPGA/CPLD Architecture and Variations (FLASH/SRAM, Size/Speed, Industrial/Commercial)
- Hardware Description Langauge (Verilog, VHDL), and Testbenches
- Timing Analysis (Fmax, Setup/Hold Violations)
- Designing Systems on Quartus/Libero with Soft/Hard Processors
- Linux and C programming on FPGA
- Clock Trees and Asynchronous Design
Following Boards were used in this class:
- Terasic DE10-Lite
- Xilinx Pynq
- Terasic DE1-SoC
Some topics further covered in ECEN5003 include:
- SystemVerilog and Testbenches (Not covered in ECEN5863)
- Adder/Multiplier/FPU Design
- CPU Architectures (ARM, RISC-V)
- Math functions and DSP
- Designing for Speed/Power/Throughput